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(1) This document contains three annexes to the SAE AS5506B Standard - the SAE Architecture Analysis and Description Language. (2) The first annex, the Error-Model Language extends the AADL core language with a state machine-based notation. This notation allows for specification of different types of faults, fault behavior of individual system components, fault propagation affecting related components in terms of peer to peer interactions and deployment relationship between software components and their execution platform, aggregation of fault behavior and propagation in terms of the component hierarchy. The notation also allows for specification fault mitigation strategies expected to be implemented in the health monitoring and fault management component of the actual system – also known as Fault Detection, Isolation, and Recovery (FDIR).

(10) AADL specifications may be processed manually or by tools for analysis and generation. This section documents additional requirements and permissions for determining compliance. Providers of processing method implementations must document a list of those capabilities they support and those they do not support. NOTE: Notes emphasize consequences of the rules described in the (sub)clause or elsewhere. This material is informative.

(10) AADL specifications may be processed manually or by tools for analysis and generation. This section documents additional requirements and permissions for determining compliance. Providers of processing method implementations must document a list of those capabilities they support and those they do not support. NOTES: Notes emphasize consequences of the rules described in the (sub)clause or elsewhere. This material is informative.

(10) AADL specifications may be processed manually or by tools for analysis and generation. This section documents additional requirements and permissions for determining compliance. Providers of processing method implementations must document a list of those capabilities they support and those they do not support. NOTES: Notes emphasize consequences of the rules described in the (sub)clause or elsewhere. This material is informative.

This standard defines a language for describing both the software architecture and the execution platform architectures of performance-critical, embedded, real-time systems; the language is known as the SAE Architecture Analysis & Design Language (AADL). An architecture model defined in AADL describes the properties and interfaces of components. Components fall into two major categories: those that represent the execution platform and those representing the application. The former is typified by processors, buses, and memory, the latter by application software modules. The model describes how these components interact and are integrated to form complete systems. It describes both functional interfaces and aspects critical for performance of individual components and assemblies of components. The changes to the runtime architecture are modeled as operational modes and mode transitions.