On-board, tactical airborne sensor systems perform functions such as target acquisition, track, designation, identification, recognition, threat warning, threat count, missile launch detection and ground mapping in support of situation awareness, self-defense, navigation, target attack, weapon support and reconnaissance.
Next generation tactical aircraft in development want those functions performed by sensor suits which exploit modular avionics concepts; exhibit low signature and enhanced stealthiness; have increased availability through increased functional redundancy; and are easy and less costly to maintain. Integrated IR sensors incorporating modular avionics concepts can satisfy those needs.
Current IR systems for airborne tactical applications are packaged in either aftermarket pod mounted configurations or in chin mounted protuberances. Considerable savings in weight, volume, prime power and cooling could result from integrating IR functions which share apertures, optics, detectors, gimbal, processor, power supplies, etc. Sharing common sensor subsystems would provide increased functional availability and ultimately functional redundancy.
Sensor subsystem and architecture for an integrated IR sensor in the 1995 time frame is based on two major IR technological developments which are expected to mature by then - staring IR detector arrays and large throughput processors executing sophisticated algorithms for rejecting sky and terrain clutter.
“Staring” arrays offer increased sensitivity and allows sufficient performance margin to employ a common frequency band. A common frequency enables much smaller optics and stabilized gimbal structures to be used which allows the IR set to be mounted inside the aircraft.
Research and development is focussed on the design of algorithms which reject terrain or cloud clutter in favor of true targets of interest. These algorithms are layered into spatial filters, temporal filters and track file discriminators. Sometimes the additional attribute of target color is processed. These algorithms tend to require very large rate data crunching and therefore require processing hardware with considerable throughput.
