Performance Analysis of a Skyline Solver on a Distributed Memory Parallel Supercomputer 921084
The performance of a parallel skyline solver is characterized analytically based on the average bandwidth, interprocessor communication speed, and the arithmetic processing speed. The formulas developed constitute a good predictor of the actual performance when the solver runs communication bound. This is the most interesting case because operation in this mode occurs for the largest processor configurations, and determines the ultimate performance of the solver. The analysis clearly shows the limiting effects of small-bandwidth coefficient matrices, and the relationship of processing speed and interprocessor communication bandwidth to the global performance. It is also shown that the largest potential gainsfor next generation machines will come from the availability of faster inter processor communication, rather than from enhanced arithmetic capability.
Citation: Castro-Leon, E. and Barton, M., "Performance Analysis of a Skyline Solver on a Distributed Memory Parallel Supercomputer," SAE Technical Paper 921084, 1992, https://doi.org/10.4271/921084. Download Citation
Author(s):
Enrique Castro-Leon, Michael L. Barton
Affiliated:
Intel Supercomputer Systems Division
Pages: 12
Event:
International Conference On Vehicle Structural Mechanics & Cae
ISSN:
0148-7191
e-ISSN:
2688-3627
Also in:
Proceedings of the Eighth International Conference on Vehicle Structural Mechanics and Cae-P-258
Related Topics:
Computer software and hardware
SAE MOBILUS
Subscribers can view annotate, and download all of SAE's content.
Learn More »