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The present work aims at the reduction of transmission delay at the level of AFDX ES (Avionics Full Duplex Switched Ethernet End-Systems). To this end, two approaches, namely Network Calculus and response time analysis (RTA), are employed in the computation of upper bound delay. To evaluate the delay regarding different scheduling policies, the arrival curve of the flow on output of ES is established for given traffic shaping algorithm and service mode. Computational analysis shows that Bandwidth Allocation Gap (BAG) based scheduling is the optimal policy at the level of AFDX ES, which leads to the tightest output arrival curve among all possible scheduling policies. BAG-based scheduling consists in assigning higher priority to virtual links with smaller BAG thus corresponding to the well known Rate-Monotonic Algorithm. Furthermore, schedulability criterion are established based on RTA.

Avionic Full-Duplex Switched Ethernet (AFDX) is one of the most promising solutions developed in recent years for implementing high-bandwidth Avionic Data Networks (ADNs) that can support the increasingly high information flow required by modern avionic systems. Although AFDX commercial products are available, developing custom implementations using generic software and hardware, without depending on third-party products, allows identifying practical challenges and constraints, prototyping and characterizing new architectures, testing new algorithms, as well as performing validation and verification in the early stage of development. In this paper, we show how an AFDX switch fabric hardware core can be designed and implemented on an FPGA to facilitate the prototyping of a generic ADN in an early development stage.

With the next generation of avionics systems, more sensors and actuators will be required for an ever increasing number of functions. In this paper, we propose a system architecture based on several enhancements to the IEEE 1451 standard, granting it a wider application range, improved resource efficiency and a generic and reusable character. This architecture facilitates the integration of next generation smart sensors with a wide range of avionics data communication networks and allows the specification of generic features to be respected. In order to meet the requirements of avionics applications, this architecture that provides a design framework offers customization of features such as bandwidth, reliability, resources utilization and compatibility with different types of transducers, especially smart sensors. The resulting resource utilization and reliability are analyzed for several configurations that provide a basis for comparison.

The present work aims at the reduction of transmission delay at the level of AFDX ES (Avionics Full Duplex Switched Ethernet End-Systems). To this end, two approaches, namely Network Calculus and response time analysis (RTA), are employed in the computation of upper bound delay. To evaluate the delay regarding different scheduling policies, the arrival curve of the flow on output of ES is established for given traffic shaping algorithm and service mode. Computational analysis shows that Bandwidth Allocation Gap (BAG) based scheduling is the optimal policy at the level of AFDX ES, which leads to the tightest output arrival curve among all possible scheduling policies. BAG-based scheduling consists in assigning higher priority to virtual links with smaller BAG thus corresponding to the well known Rate-Monotonic Algorithm. Furthermore, schedulability criterion are established based on RTA.