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Engine ECU testing requires sophisticated sensor simulation and event capture equipment. FPGAs are the ideal devices to address these requirements. Their high performance and high flexibility are perfectly suited to the rapidly changing test needs of today's advanced ECUs. FPGAs offer significant advantages such as parallel processing, design scalability, ultra-fast pin-to-pin response time, design portability, and lifetime upgradability. All of these benefits are highly valuable when validating constantly bigger embedded software in shorter duration. This paper discusses the collaboration between Valeo and NI to define, implement, and deploy a graphical, open-source, FPGA-based engine simulation library for ECU verification.