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Multi-core processors are becoming increasingly prevalent, with several multi-core solutions being offered for the automotive sector. Recognizing this trend, the AUTomotive Open System ARchitecture (AUTOSAR) standard Version 4.0 has introduced support for multi-core embedded real-time operating systems. A key element of the AUTOSAR multi-core specification is the spinlock mechanism for inter-core task synchronization. In this paper, we study this spinlock mechanism from the standpoint of timing predictability. We describe the timing uncertainties introduced by standard test-and-set spinlock mechanisms, and provide a predictable priority-driven solution for inter-core task synchronization. The proposed solution is to arbitrate critical sections using the well-established Multi-processor Priority Ceiling Protocol [3], which is the multiprocessor version of the ceiling protocol for uniprocessors [1, 2] used by AUTOSAR.