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Technical Paper

Automatic Gateway Prototype Generation for Optimization of E/E-Architectures Based on High-Level Models

2011-04-12
2011-01-1029
To fulfil the increasing requirements of electric/electronic architectures in automotive environments new concepts for future Electronic Control Units (ECU) are needed. Novel hardware architectures offer much higher potential compared to standard microcontroller devices. In previous publications the advantages of modular gateway architectures over standard microcontroller solutions were shown, especially regarding performance, low latency times, busload independency and configurability. However developing hardware gateway configurations is neither convenient nor practical. But recent development showed a trend towards early e/e-architecture models in tools like PREEvision which are usually used for architecture exploration. In this contribution we demonstrate an approach that closes the gap between such modeling tools and the reconfigurable gateway architecture.
Journal Article

Car-to-X Simulation Environment for Comprehensive Design Space Exploration Verification and Test

2010-04-12
2010-01-0451
A future car-to-x communication system has to fulfil a lot of different requirements concerning high performance and functionality that are given by the field of application. To be able to optimize the system architecture regarding these constraints an intensive architecture evaluation and investigation is necessary. Within this paper a simulative approach for comprehensive design space exploration, verification, and test of a car-to-x communication unit is presented. The proposed simulation environment allows for a flexible adaption to the test case by being able to interconnect an arbitrary number of simulators of different type and different granularity. As a novelty complete embedded car-to-x systems can be investigated by integrating several SystemC based architecture models into an environmental simulation and observing their behavior and interaction.
Technical Paper

Using Timing Analysis for Evaluating Communication Behavior and Network Topologies in an Early Design Phase of Automotive Electric/Electronic Architectures

2009-04-20
2009-01-1379
The increasing functionality and complexity of future electric/electronic architectures requires efficient methods and tools to support design decisions, which are taken in early development phases 6. For the past four years, a holistic approach for architecture development has been established at Mercedes-Benz Cars R&D department. At its core is a seamless design flow, including the conception, the analysis and the documentation for electric/electronic architectures. One of the actual challenges in the design of electric/electronic architectures concerns communication behavior and network topologies. The increasing data exchange between the ECUs creates high requirements for the networks. With the introduction of FlexRay 21 and Ethernet the automotive network architecture become a lot more heterogeneous. Especially gateways must fulfill many new requirements to handle the strict periodic schedule of FlexRay and the partly event-triggered communication on CAN-busses 23.
Technical Paper

Standards for Electric/Electronic Components and Architectures

2008-10-20
2008-21-0022
To fulfil the increasing requirements of electric/electronic architectures in automotive environments new concepts for future Electronic Control Units (ECU) are needed. Novel architectures offer much higher potential in terms of performance compared to higher clock rates in standard microcontroller devices. The following contribution discusses the performance benefits of new concepts as well as advantages in early development phases. We focus on two systems: A central body controller and a gateway system. Both are realized on reconfigurable hardware. In comparison to microcontrollers the FPGA technology offers the opportunity of task parallelization and partial dynamically reconfiguration. These novel architectures demand new tool flows and standards which will be also addressed in this paper.
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